Professor & Controller of Examinations
I am an academician with teaching and research experience of 18 years. Being a teacher has allowed me to keep young, laugh, and do amazing things with children. I really feel that teachers are the luckiest people on earth because we are submerged in young souls all the time. Continuing to grow in my career is probably the most important thing to me.
A big thing I've learned about me is that if I'm learning, my students will learn too
| Sl.No | Qualification Level | University | Area of Specialization | Year of Compeltion | Awards | ||||
|---|---|---|---|---|---|---|---|---|---|
| 1 | B.E | Visvesvaraya Technological University, Belgaum | Electronics and Communication | 2004 | |||||
| 2 | M.Tech | Visvesvaraya Technological University, Belgaum | VLSI Design and Embedded System | 2006 | |||||
| 3 | Ph.D | Manipal Academy of Higher Education, Manipal | VLSI Signal Processing | 2019 | |||||
Rohan Pinto and Jennifer C Saldanha, "Real Time Feedback System for Speech Dysfluency in Children," Smart Sensors Measurement and Instrumentation, Lecture Notes in Electrical Engineering, Vol. 957, pp. 75-91, 2023. (Scopus Index)(Publisher: Springer).
Rohan Pinto and Jennifer C Saldanha, "Speech Emotion Recognition Using Deep Learning," International Journal of Innovative Research in Technology, Vol. 10, Issue 1, 2023. (Publisher: Solaris).
Rohan Pinto, Vijay Ganesh PC, and Jennifer C Saldanha, "Rainfall Measurement And Prediction Using IOT And Artificial Intelligence," International Journal of Creative Research Thoughts, Vol. 11, Issue 6, 2023.
Rohan Pinto and Jennifer C Saldanha, "Dual-scan Architecture for 2D Discrete Wavelet Transform using Modified Lifting Algorithm," International Journal of Systems, Control and Communications, vol. 12, no. 4, pp. 327-339, 2021. (Scopus Index)(Publisher: Inderscience).
Rohan Pinto and Kumara Shama, "An Efficient Architecture for Modified Lifting‑Based Discrete Wavelet Transform," Sensing and Imaging, vol. 21, no. 53, pp. 1-22, 2020. (Scopus Index)(Publisher: Springer).
Rohan Pinto, "Modified 32-Bit Shift-Add Multiplier Design for Low Power Application", Iranian Journal of Electrical and Electronic Engineering, vol. 16, no. 4, pp. 487-493, 2020. (Scopus Index)(Publisher: Iran University of Science & Technology)
Rohan Pinto and Kumara Shama, "An Efficient VLSI Architecture for Two-Dimensional Discrete Wavelet Transform," International Journal of High Performance Systems Architecture, vol. 8, no. 3, pp. 179-191, 2019. (Scopus Index)(Publisher: Inderscience)
Rohan Pinto and Kumara Shama, “Low Power Modified Shift-Add Multiplier design using Parallel Prefix Adder,” Journal of Circuit, System and Computers, vol. 28, No. 2, pp. 1950019-1 to 1950019-18, 2019. (Scopus Index)(Publisher: World Scientific)
Rohan Pinto and Kumara Shama, “Efficient Shift-Add Multiplier Design using Parallel Prefix Adder,” International Journal of Control Theory and Application, vol. 9, no. 39, pp. 45-53, 2016. (Scopus Index)(Serial Publication)
Rohan Pinto and Kumara Shama, “Low-Area Low-Power Parallel Prefix Adder Based on Modified Ling Equations,” International Journal of Control Theory and Application, vol. 9, no. 18, pp. 8935-8943, 2016. (Scopus Index)(Serial Publication)
Jennifer Saldanha, Ananth Krishna T. and Rohan Pinto, “Cepstral Analysis of Speech for the Vocal Fold Pathology Detection,” International Journal of Computer Applications, vol. 3, pp. 14 - 18, 2013. (Scopus Index)(Publisher: Foundation of Computer Science )
Jennifer Saldanha, Ananth Krishna T. and Rohan Pinto, “Vocal Fold Pathology Assessment Using Mel-Frequency Cepstral Coefficients and Linear Predictive Cepstral Coefficients Features,” Journal of Medical Imaging and Health Informatics, vol. 4, no. 2, pp. 168-173, April 2014. (Scopus Index)(American Scientific Publishers)
Rohan Pinto and Vardhan M, "Application in Machine Learning in Bio-Medical Image Analysis," International Conference on Evolutionary Algorithms and Soft Computing Techniques (EASCT-23), 20th-21st Oct 2023, Bangalore (Scopus Index).
Rohan Pinto, Shibani S Shetty, Shravya S, Thrupthi, and Sushmitha, "Automated Ration Material Distribution System," IEEE Int. Conf. on Electrical, Electronics, Communication, Computer Technologies and Optimization Techniques (ICEECCOT), 10th-11th, Dec 2021, Mysore (Scopus Index).
Rohan Pinto, Akash Kumar R, Ashish Ashok Shetty, Mohammed Saud, and Preemal Sharanya Serrao, "Design and Implementation of 64-bit Parallel Prefix Adder," IEEE Int. Conf. on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER-2020), 30th - 31st Oct. 2020, Udupi (Scopus Index).
Rohan Pinto and Kumara Shama, “Efficient Shift-Add Multiplier Design using Parallel Prefix Adder,” XIII Control Instrumentation System Conference (CISCON- 2016). 17th – 18th Oct. 2016, Manipal.
Rohan Pinto and Kumara Shama, “Low-Area Low-Power Parallel Prefix Adder Based on Modified Ling Equations,” Int. Conf. on Sustainable Computing in Engineering, Science and Management (SCESM-2016), 9th – 10th Sept. 2016, Noida.
Sana S.M., Vijay Ganesh P.C., Rohan Pinto, “Design of Folded Architecture for One Dimensional DWT using Verilog,” National Conf. on Advances in Communication and Signal Processing (NCACSP-2015). 13 th – 14 th Aug. 2015, SJEC, Mangalore.
Sana S.M., Vijay Ganesh P.C., Rohan Pinto, “Adders and Multipliers for One Dimensional DWT,” Int. Conf. on Innovative Research and Solutions (ICIRS-2015), 11 th Apr. 2015, Bangalore.
Sana S. M. and Rohan Pinto, “Implementation of 16-bit Ling Adder and its Comparison with 16-bit CLA Adder,” National Conf. on Recent Advances on Communication Networks (NCRACN’14). 21 st – 22 nd Mar. 2014, RNSIT, Bangalore.
Jennifer Saldanha, Ananth Krishna T., and Rohan Pinto, “Vocal Fold Pathology Assessment using PCA and LDA,” Int. Conf. on Intelligent Systems and Signal Processing (ISSP), 1-2 Mar. 2013, Gujarat.
Jennifer Saldanha, Ananth Krishna T., and Rohan Pinto, “Cepstral Analysis of Speech for the Vocal Fold Pathology Detection, Int. Conf. on Electronic Design and Signal Processing (ICEDSP’12) , 20 - 22 Dec. 2012, MIT, Manipal.
Rohan Pinto, “Distributed Clock Generation for VLSI System,” National Conf. on Communication, Control & Computing (NCCC-2011). 11 th &12 th Feb. 2011, SJEC, Mangalore.
Abdul Kareem and Rohan Pinto, “Specialized Algorithms for Optimizing Error Function in Soft Computing: A Review,” National Conf. on Communication, Control & Computing (NCCC-2011). 11 th &12 th Feb. 2011, SJEC, Mangalore.
Rohan Pinto, “Implementation of MAC Unit for Filter Operation,” National Conf. on Modern Trends in Science & Technology (MTST’11). 14 th – 15 th Oct. 2011, MVSIT, Thodar.
Rajshekara K. and Rohan Pinto, “Classification of Mammograms Based on Feature Extraction Techniques,” National Conf. on Modern Trends in Science & Technology (MTST’11). 14 th – 15 th Oct. 2011, MVSIT, Thodar.
Rohan Pinto, “Shift Invert Coding for Low Power VLSI,” National Conf. on Modern Trends in Science & Technology (MTST’11). 14 th – 15 th Oct. 2011, MVSIT, Thodar.
Girish Joshi and Rohan Pinto, “Implementation of Multicast Algorithm for Wireless Mesh Networks,” National Conf. on Modern Trends in Science & Technology (MTST’11). 14 th – 15 th Oct. 2011, MVSIT, Thodar.
Recipient of Dr T M A Pai Ph.D scholarship. Recipient of Young Researcher Award 2021 (Green Thinkerz International Awards)
A national-level five day online FDP on Academic Writing organized by St. Joseph College of Engineering from 4th April - 9th April 2022.
One day Faculty Development Program on Artificial Intelligence and Machine Learning organized by St. Joseph College of Engineering from 24th February 2022.
Four day workshop on Strategic Leadership for Faculty Members organized by St. Joseph College of Engineering on 7th, 14th, 21st, and 28th Sep 2021.
One day workshop cum training on Contineo Software organized by St. Joseph College of Engineering on 21st Sep 2021.
Five days Intensive FDP on Problem Based Learning (PBL) organized by St. Joseph College of Engineering from 13/09/2021 to 17/09/2021.
Three days workshop on Project Planning and Scheduling organized by St. Joseph College of Engineering on 19th, 26th Aug, and 1st Sep 2021.
Five days Faculty development program on Implementation of NEP-2020 at Engineering Institution organized by St. Joseph College of Engineering from 30/08/2020 to 06/09/2021.
Six days Faculty development program on Curriculum Development Inspired by NEP-2020 organized by St. Joseph College of Engineering on 8th to 10th April and 15th to 17th April 2021.
Five days Faculty development program on Analog and Digital VLSI Design organised by NMIT, Bengaluru from 30/07/2020 to 03/08/2020
One week Faculty development program on Insights on writing research proposal and funding organized by St. Joseph College of Engineering from 20/07/2020 to 24/07/2020.
Two days online Faculty development program on Skill Enhancement for Academicians organized by Jain College of Engineering, Belagavi on 8th and 9th June 2020.
Six days online NAAC Awareness Program for Faculty organized by Marathwada Mitra Mandal Institute of Technology (MMIT), Lohgaon, Pune from 08/05/2020 to 14/05/2020.
One day workshop on Free MOOC to Complement Engineering Education organized by IEEE-Bangalore section on 13th May 2020
Two weeks Faculty development program on Latex organized by IIT, Bombay spoken tutorial from 17/04/2020 to 30/04/2020.
One day workshop on Effective Online Engineering Education: Tips & Tricks organized by IEEE-Bangalore section on 26th April 2020
One day workshop on Physical Design at SOIS, Manipal. (4th Mar. 2017).
Two days workshop on Wavelet Transform: Basic Theory and Practice at MIT, Manipal. (24th – 25th Apr. 2015)
Three day faculty development programme on Outcome Based Education at SJEC, Mangalore. (10th – 12th July 2014)
One day Inspirational workshop at SJEC, Mangalore. (7th July 2014).
Two day workshop on Research Methodology at SJEC, Mangalore. (26th – 27th June 2014)
Two day faculty development programme on Introduction to Qualitative Research at TAPMI, Manipal. (7th – 8th Feb. 2014).
Two day faculty development programme on Outcome Based Education at SJEC, Mangalore. (31st July – 1st Aug. 2013).
Two day training and workshop on Latest Trends in EDA for Communication, Electronics and VLSI Technology at SJEC, Mangalore. (29 th – 30 th July 2013).
Four day Appreciative Experiential Learning workshop at SJEC, Mangalore. (9th –12th July 2013).
Two day workshop on ASIC design using Open Source EDA at VTU regional office, Mysore. (16th – 17th Apr. 2013).
One day NPTEL Awareness workshop at CEC, Benjanapadavu. (5th Dec. 2012). Three day faculty development programme on Mixed Signal Processor (MSP-430) at SJEC, Mangalore. (23rd – 25th July 2012).
Two day faculty development programme on Low Power Embedded Systems using MSP430 Microcontroller at SIT, Valachil. (23rd – 23rd Jan. 2012).
One day workshop on FPGA based System design using Altera Tools at NITK, Surathkal. (22 nd Aug. 2009).
Three day workshop on Labview and Virtual Instrumentation package at SJEC, Mangalore. (1st – 3rd Apr. 2009).
Two week summer course on Recent Trends in Communication Engineering, Systems, Networks and Services at NITK, Surathkal. (28 th July – 8 th Aug. 2008).
Eight day short term training programme on VLSI Design Flow and FACE Programme at Reva Institute of Technology, Bangalore. (23 rd – 30 th June 2008)
Five day Soft Skills workshop at Infosys, Bangalore. (21st – 25th Jan. 2008). Three day workshop on Techniques of Low Power VLSI design and Hands on Tool exposure on Synopsys and Mentor Graphics Design Suites at NMAMIT, Nitte. (29th – 31 st Aug. 2007).
One day workshop on Basic Electronics at GIT, Belgaum. (13th Sept. 2006).
Dr Rohan Pinto
Professor & Controller of Examinations
B.E, M.Tech, Ph.D
