The department of EEE conducted the “demonstration session on Hardware Description Language (HDL)” on 30 July 2024, for third-year Electrical and Electronics Engineering students to introduce them to the fundamentals of HDLs, which are crucial for designing and simulating digital systems. Ms Deepthi S R, Assistant Professor, Dept. of ECE, SJEC is the resource person for the session. The program was coordinated by Ms Madhavi Gatty, Assistant Professor, EEE department. This session was aimed to enhance the students' understanding of HDLs and their practical applications in modern electronic design.
The key objectives of the session were:
Ms Deepthi began the session by defining HDL as a language used to describe the behaviour and structure of electronic systems. She emphasized the significance of HDLs in enabling designers to create complex digital circuits efficiently.
The session covered the syntax and structure of Verilog, focusing on essential components such as data types, operators, and basic constructs.
She also demonstrated writing a simple HDL program for basic logic gates. She explained how to code the gates in Verilog, followed by simulation using an HDL Xilinx tool. This segment provided students with a clear understanding of how to implement and test HDL designs.
The demonstration session was highly appreciated by the students and successfully met its objectives by providing a comprehensive introduction to HDLs, demonstrating basic constructs, and offering practical experience with HDL design and simulation.
