The Department of Electronics and Communication Engineering in association with
Samarthya organized a workshop on "Advanced Digital System Design Using FPGA”
during 19-24, September 2022 for the VI Semester ECE Students (35 Students). The
Resource person for the workshop were Mr Vijay Ganesh P C, Assistant Professor, Dr
Rohan Pinto. Associate Professor, Ms Deepthi S R, Assistant Professor, Ms Jayalakshmi K P,
Assistant Professor, Ms Priya Seema Miranda, Assistant Professor and Ms K Aarya Shri,
Assistant Professor of ECE department The Workshop was focused mainly on the following
objectives:
1. To Analyze and Design the basic building blocks of Digital Systems using FPGA.
2. To Design a Microprocessor using RISC ISA Architecture.
The main Objectives of Phase II of STTP were as follows:
1. Extend the microprocessor design developed during the Phase I to a microcontroller
by introducing additional peripherals such as GPIO, UART, Interrupt and Timer.
2. To develop a simulator/Compiler for the hardware developed.
The Workshop was coordinated by Ms Jayalakshmi K P, Ms Priya Seema Miranda and Ms K
Aarya Shri, Assistant Professors Department of ECE.
